Cathode Interface Engineering in High Efficiency Low TemperaturePerovskite Solar Cells
David Cheyns a, Weiming Qiu a b, Jef Poortmans a c, Paul Heremans a c, Ludo Froyen b
a IMEC, Belgium, Kapeldreef, 75, Leuven, Belgium
b Department of Metallurgy and Materials Engineering, KULeuven, Kasteelpark Arenberg 44, Heverlee,3001, Belgium
c Department of Electrical Engineering, KULeuven, Kasteelpark Arenberg 10,Heverlee, 3001, Belgium
Oral, Weiming Qiu, presentation 021
Publication date: 1st July 2014

Methylammonium lead halide perovskite based solar cells have attracted tremendous research interest in the past few years, with the power conversion efficiency (PCE) skyrocketed from the first reported value of 3.8% to record values close to 20%.The strong and broad light absorption, high carrier mobility, very long electron and hole diffusion length, and low exciton binding energy make them the ideal materials for the next generation solar cells. In order to effectively utilize all these advantages, layer stack engineering is crucial. The interface between the active layer and the electrodes, which determines the effectiveness of photo-induced hole and electron extraction, plays an important role in those for perovskite solar cells. In this work, high efficiency low temperature solution processed CH3NH3IxCl3-x based perovskite solar cells were fabricated using a device structure of ITO/PEDOT:PSS/Perovskite/PC60BM/ZnO nanoparticles (NPs)/Ag. The ZnO NPs were synthesized according to a low temperature sol-gel method, which opens the opportunity to keep all processing steps below 100°C. The ZnO NP layer was processed by spin-coating its dispersion in 1-butanol for three times, which gave the best performance. Compared to ITO/PEDOT:PSS/Perovskite/PC60BM/Al devices, the incorporation of ZnO NPs greatly boosts the open-circuit voltage (Voc) and fill-factor (FF) by virtue of the improved cathode interface. Our best devices show Voc of 1.03 V, short-circuit current density (Jsc) of 21.65 mA/cm2, and FF of 63.3%, resulting in 13.8% PCE.On top of the increased shunt resistance, the new stack layout shows a high device yield. Statistics on over hundred small scale devices demonstrate over 98% functional solar cells, and a low standard deviation on PCE. We attribute this to the improved topology of the complete stack before the deposition of the metal top contact. Initial lifetime tests in nitrogen environment show an interesting trend: an increase in PCE is observed during the first days, followed by a slow decrease in the following weeks.



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