DOI: https://doi.org/10.29363/nanoge.neumatdecas.2023.002
Publication date: 9th January 2023
In this presentation, we will present the recent progresses on the compute-in-memory (CIM) prototype chips using the resistive random access memory (RRAM) technology. Mixed-signal RRAM based CIM can process the multiply-accumulate (MAC) functions in deep neural networks efficiently using the integrated analog-to-digital converter (ADC), thus it is regarded as a competitive solution for AI hardware design for edge intelligence. In collaboration with TSMC Corporate Research, we taped out two generations of RRAM CIM macros in TSMC 40 nm process. The following features are supported in these prototype chips: 1) Adaptive input sparsity control; 2) Reconfigurable weight precision; 3) Integrated digital compute units; 4) Input-aware on-chip ADC reference; 5) On-chip write-verify controller; 6) Input encoding for embedded security; 7) ADC-less communication between sub-arrays with pulse-width-modulation; 8) In-situ error correction code that preserves the MAC parallelism. Finally, the prospects and challenges of CIM chip design will be summarized.
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