Proceedings of nanoGe Fall Meeting 2018 (NFM18)
DOI: https://doi.org/10.29363/nanoge.nfm.2018.217
Publication date: 6th July 2018
State-of-the-art imagers use silicon circuitry for pixel readout, in combination with either a silicon absorber (visible region) or flip-chip bonded III-V materials (infrared region). Thin-film layers show a promise to replace these absorber layers, as the optical cross-talk can be reduced, and a heterogeneous integration on silicon chips enables further downscaling of the pixel size. In this talk we will discuss our progress and the challenges to incorporate colloidal quantum dot materials into a fab compatible process flow. Challenges lay in translating the chemical vocabulary and incorporating the silicon production fab restrictions into the device optimization. We will show initial results of incorporating infrared PbS based materials (950 nm and 1450 nm quantum peak absorption) into a silicon fab compatible stack. From a device aspect, the focus lays on high EQE values in combination with low noise (= dark current limited). From an integration aspect, the available contact materials are limited, and all layers need patterning using photo-lithography to enable processing on 200 or 300 mm wafers. These two aspects (device and integration) should be looked at jointly. A screening and optimization method will be presented, including a full opto-electronic characterization to determine the optimal stack constitution. This method enables a quick uptake of next generation quantum dot (or other thin-film) materials into wafer scale imager production.