Volatile and non-volatile memristive devices for future computing
Sabina Spiga a, Mrinmoy Dutta a, Manuel Escudero a, Stefano Brivio a
a Consiglio Nazionale delle Ricerche (CNR), Istituto per la Microelettronica e Microsistemi (IMM), via C. Olivetti 2, Agrate Brianza, Italy
Materials for Sustainable Development Conference (MATSUS)
Proceedings of MATSUS Spring 2025 Conference (MATSUSSpring25)
Advancements in Memristor Technology: From Materials to Devices and Applications - #MemTech
Sevilla, Spain, 2025 March 3rd - 7th
Organizers: Valeria Bragaglia, Wooseok Choi and Juan Bautista Roldan
Invited Speaker, Sabina Spiga, presentation 511
DOI: https://doi.org/10.29363/nanoge.matsusspring.2025.511
Publication date: 16th December 2024

Memristive devices are currently explored for neuromorphic and emerging unconventional computing concepts towards future low-power computing systems.  These devices have been proposed as: (i) computing elements to support in memory computing in neural networks, (ii) building blocks to reproduce in hardware synaptic or neural functionalities, and (iii) key elements to build nonlinear dynamical circuits. In this framework, both volatile and non-volatile resistance switching memristive devices are widely studied to engineer various computing functions [1].

This talk will present our recent results in the field of volatile electrochemical memristors based on the Ag/SiOx/Pt structure and how to implement neuromorphic functionalities such as short-term plasticity, paired-pulse facilitation and inhibition, and integrative functions. We will discuss how the interplay between switching times and relaxation effect controls the memristors dynamics and possible various switching modes that can be used to reproduce key synaptic and neuronal functions [2].

The second part of the talk will discuss an unconventional computing approach based on analogue Pt/HfO2/TiN RRAM devices. We exploit the programmable nonlinearity of the non-volatile memristors to build an analogue nonlinear dynamical circuit based on the Murali- Lakshmanan-Chua (MLC) architecture [3]. The circuit can be tuned from periodic to chaotic behavior through the modulation of an input signal. We demonstrate its processing ability in an approach based on single-node reservoir for various nonlinear classification tasks.

This work has been partially funded by Ministero delle Imprese e del Made in Italy (MIMIT) under IPCEI Microelettronica 2, project MicroTech_for_Green; by the project Analoge COmputing with Dynamic Switching Memristor Oscillators: Theory, Devices and Applications (COSMO, Grant PRIN 2017LSCR4K002), funded by the Italian Ministry of Education, University and Research (MIUR); and by the EU-Horizon2020 research project MeM-Scales (grant agreement no. 871371).

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