Proceedings of MATSUS Spring 2025 Conference (MATSUSSpring25)
DOI: https://doi.org/10.29363/nanoge.matsusspring.2025.045
Publication date: 16th December 2024
Developing high-mobility p-type semiconductors that can be grown using silicon-compatible processes at low temperatures, has remained challenging in the electronics community to integrate complementary electronics with the well-developed n-type counterparts.
This presentation will discuss our recent progress in developing high-performance p-type semiconductors as channel materials for thin film transistors. For the first part of my talk, I will present high-performance tin (Sn2+) halide perovskite transistors using high-crystallinity and uniform cesium-tin-triiodide-based semiconducting layers [1.2]. The optimized devices exhibit high field-effect hole mobilities of over 50 cm2 V−1 s−1, large current modulation greater than 108, and high operational stability and reproducibility [3]. In addition, we explore triple A-cations of caesium-formamidinium-phenethylammonium to create high-quality cascaded Sn perovskite channel films. As such, the optimized TFTs show record hole mobilities of over 70 cm2 V−1 s−1 and on/off current ratios of over 108, comparable to the commercial low-temperature polysilicon technique level.
Next, I present an amorphous p-type oxide semiconductor composed of selenium-alloyed tellurium in a tellurium sub-oxide matrix, demonstrating its utility in high-performance, stable p-channel TFTs, and complementary circuits [4]. Theoretical analysis unveils a delocalized valence band from tellurium 5p bands with shallow acceptor states, enabling excess hole doping and transport. Selenium alloying suppresses hole concentrations and facilitates the p orbital connectivity, realizing high-performance p-channel TFTs with an average field-effect hole mobility of ~15 cm2 V-1 s-1 and on/off current ratios of 106~107, along with wafer-scale uniformity and long-term stabilities under bias stress and ambient aging.
References
[1] A. Liu, Y.-Y. Noh et al, Nature Electronics 5, 78-83 (2022)
[2] H. Zhu, Y.-Y. Noh et al, Nature Electronics 6, 650-657 (2023)
[3] A. Liu, Y.-Y. Noh et al, Nature Electronics 6, 559-571 (2023)
[4] A. Liu, Y.-Y. Noh et al, Nature, 629, 798–802 (2024)
This study was supported by the Ministry of Science and ICT through the National Research Foundation, funded by the Korean Government (NRF-2021R1A2C3005401 and RS-2023-00260608)), Samsung Electronics, and Samsung Display.
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