The Origin of Hysteresis in I-V curve for Planar Structure Perovskite Solar Cells Rationalized with Surface Boundary Induced Capacitance Model
Hiroshi Segawa a, Takaya Kubo a, Jotaro Nakazaki a, Ludmila Cojocaru a, Satoshi Uchida a, Shoji Kaneko, Piyankarage V. V. Jayaweera
NIPHO
Proceedings of Perovskite Thin Film Photovoltaics (ABXPV16)
Barcelona, Spain, 2016 March 3rd - 4th
Organizers: Emilio Palomares and Nam-Gyu Park
Oral, Satoshi Uchida, presentation 019
Publication date: 14th December 2015

We investigated origin of hysteresis in I-V curves of a planar perovskite cell using different equivalent circuit models and simulation of their I-V curves.  A planar cells showing huge hysteresis, PCE of 18.0% on reverse and 8.8% on forward scan was used for validating the equivalent circuits.  We found that the standard equivalent circuit with a diode, a series resistance and a shunt resistance does not reproduce the hysteresis I-V curves.  Even, incorporation of a capacitive component in the circuit also did not match the experimental hysteretic I-V curves.  However, an equivalent circuit composed of two series connected diodes, two capacitors, two shunt resistances and a series resistance reproduced the hysteretic I-V curves, the simulated curves matched closely with the experimental I-V curves.  This suggests that perovskite cell has two active interfaces; TiO2/ CH3NH3PbI3 and CH3NH3PbI3/spiro-OMeTAD.  Hysteresis is essentially caused by carrier accumulation at these active interfaces . We believe that the defects (voids) present at the interface TiO2/CH3NH3PbI3 create high electrical capacitance and the other interface with less defects exhibit small capacitance, creating hysteresis, which shows good agreement with the simulated results.



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